A 1.2 V CMOS op-amp with high driving capability

Author

Ferri, Giuseppe

Author_Institution

Dipt. di Ingegneria Elettrica, l´´Aquila Univ., Italy

Volume

1

fYear

1998

Firstpage

436

Abstract

In this work, a new low voltage (1.2 V supply) op-amp, able to drive loading resistance as low as 500 Ω, with 2 V/μs slew rate and 380 ns settling time, is presented. The low voltage gain is 80 dB for 1 KΩ and 124 dB for 1 MΩ load. The gain bandwidth is 2.4 MHz. The power dissipation is 0.268 mW. The circuit, designed in a standard 0.5 μ technology, has rail-to-rail input and output stages and constant transconductance with the input common mode signal. Its performances have been obtained combining the topologies of a very efficient output stage and of the input and biasing stages of a CMOS integrated OTA, previously developed

Keywords

CMOS analogue integrated circuits; operational amplifiers; 0.268 mW; 0.5 micron; 1 kohm to 1 Mohm; 1.2 V; 380 ns; 500 ohm; 80 to 124 dB; CMOS; biasing stages; driving capability; gain bandwidth; input common mode signal; loading resistance; op-amp; power dissipation; rail-to-rail input; rail-to-rail output; settling time; slew rate; transconductance; voltage gain; Bandwidth; CMOS technology; Gain; Integrated circuit technology; Low voltage; Operational amplifiers; Power dissipation; Rail to rail inputs; Signal design; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-4455-3

Type

conf

DOI

10.1109/ISCAS.1998.704470

Filename

704470