Title :
A Behavioral Synthesis Frontend to the Haste/TiDE Design Flow
Author :
Nielsen, S.F. ; Sparsø, J. ; Jensen, J.B. ; Nielsen, J.S.R.
Author_Institution :
Dept. of Inf. & Math. Modeling, Tech. Univ. of Denmark, Lygnby
Abstract :
This paper presents a complete design tool which performs automatic behavioral synthesis of asynchronous circuits (resource sharing, scheduling and binding).The tool targets a traditional control-datapath-style template architecture. Within the limitations set by this template architecture it is possible to optimize for area (which is our main focus) or for speed. This is done by simply using different cost functions.Input to the tool is a behavioral description in the Haste language, and output from the tool is a Haste program describing the synthesized implementation consisting of a data-path and a controller. The tool may be seen as an add-on to the Haste/TiDE tool flow, and it can be used to automatically optimize parts of a design and to quickly explore alternative optimizations. The paper outlines the design flow, explains key elements of the design tool, and presents a number of benchmark results.
Keywords :
asynchronous circuits; network synthesis; Haste language; asynchronous circuits; automatic behavioral synthesis; behavioral synthesis frontend; control-datapath-style template architecture; haste-TiDE design flow; resource binding; resource scheduling; resource sharing; Asynchronous circuits; Automatic control; Automatic generation control; Circuit synthesis; Cost function; Design optimization; Informatics; Mathematical model; Resource management; Tides; asynchronous circuits; behavioral synthesis; clockless circuits; control data flow graph; high level synthesis; syntax directed translation.;
Conference_Titel :
Asynchronous Circuits and Systems, 2009. ASYNC '09. 15th IEEE Symposium on
Conference_Location :
Chapel Hill, NC
Print_ISBN :
978-1-4244-3933-1
DOI :
10.1109/ASYNC.2009.10
