Comparing of reusable IP design method with RL and FSM

IP reuse methodology is considered a good solution to the complexity of SoC (system on chip) and the time pressure from market. Random-logic (RL) and finite-state-machine (FSM) are two main implementation methods in reusable IP design. FSM method is far more widely accepted and applied by IP designers because its can describe IP at behavior level. RL design method, focusing on the specific character of the target circuit, can describe IP according to signal flow. Signals are the main object to be described in this method, and the interconnections among signals are key points in design process. The differences and relations between those two methods are studied. An IIC bus interface model is completed with those two methods respectively, it is shown that the area of the circuit designed with RL method is 20% less than that of the circuit designed with FSM method.