DocumentCode
1697384
Title
Real-time reconfigurable logic circuits using neuron MOS transistors
Author
Shibata, T. ; Kotani, K. ; Ohmi, T.
Author_Institution
Thoku Univ., Sendai, Japan
fYear
1993
Firstpage
238
Lastpage
239
Abstract
A highly-flexible real-time-reconfigurable logic circuit implemented using a regular CMOS process is presented. The circuit, called soft-hardware logic (SHL), can alter its logic function (e.g. AND, OR, NAND, NOR, Exclusive OR, Exclusive NOR) in real time according to external control signals with no hardware modification. The circuit is one application of the neuron MOSFET (neuMOS or vMOS), a multiple-input functional MOS transistor simulating the function of biological neurons by a single device. The concept has been verified by experiments using test circuits fabricated by a standard double-polysilicon CMOS process. Details on the operational principle of the SHL circuit as well as design techniques are presented. One extension of this vMOS concept is a dynamic data-matching circuit in which rules for data matching are time-variable. Circuit operation has been verified by experiments.<>
Keywords
CMOS integrated circuits; integrated logic circuits; logic design; neural chips; real-time systems; design techniques; double-polysilicon CMOS process; dynamic data-matching circuit; external control signals; multiple-input functional MOS transistor; neuron MOS transistors; real-time-reconfigurable logic circuit; soft-hardware logic; Biological system modeling; CMOS logic circuits; CMOS process; Circuit testing; Hardware; Logic circuits; Logic functions; MOSFET circuits; Neurons; Reconfigurable logic;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1993. Digest of Technical Papers. 40th ISSCC., 1993 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-0987-1
Type
conf
DOI
10.1109/ISSCC.1993.280032
Filename
280032
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