A class of vector-tracing motion estimation architectures for MPEG2 type coding for TV and HDTV

Author

Gumm, M. ; Mombers, F. ; Dogimont, S. ; Mlynek, D.

Author_Institution

Ecole Polytech. Fed. de Lausanne, Switzerland

Volume

5

fYear

1998

Firstpage

3033

Abstract

A class of motion estimation VLSI architectures is presented which has been developed for the use in studio quality MPEG-2 encoders. A new, fast motion estimation algorithm is applied which exploits both, temporal and spatial redundancies in motion vector fields and delivers near full search quality on large search windows. The proposed architectures are MIMD based, scalable both on chip and system level, and provide high flexibility according to a programmable RISC/co-processor approach. A chip tailored to TV resolution requirements is under design. The same architecture principle can be used to build HDTV capable motion estimation devices

Keywords

CMOS digital integrated circuits; VLSI; digital signal processing chips; digital television; high definition television; image resolution; motion estimation; search problems; video coding; 0.35 micron; HDTV; MIMD based scalable architectures; MPEG2 type coding; TV resolution; VLSI architectures; motion vector fields; programmable RISC/co-processor approach; search quality; search windows; spatial redundancy; studio quality MPEG2 encoders; temporal redundancy; vector-tracing motion estimation architectures; Digital video broadcasting; Genetics; HDTV; Motion estimation; Redundancy; TV; Transform coding; Very large scale integration; Video compression; Video sequences;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech and Signal Processing, 1998. Proceedings of the 1998 IEEE International Conference on

Conference_Location

Seattle, WA

ISSN

1520-6149

Print_ISBN

0-7803-4428-6

Type

conf

DOI

10.1109/ICASSP.1998.678165

Filename

678165