Title :
Integrated adaptive DC/DC conversion with adaptive pulse-train technique for low-ripple fast-response regulation
Author :
Zhang, Chuang ; Ma, Dongsheng ; Srivastava, Ashok
Author_Institution :
Dept. of Electr. & Comput. Eng., Louisiana State Univ., Baton Rouge, LA, USA
Abstract :
Dynamic voltage scaling (DVS) is a very effective low-power design technique in modem digital IC systems. On-chip adaptive DC/DC converter, which provides adjustable output voltage, is a key component in implementing DVS-enabled system. This paper presents a new adaptive DC/DC converter design, which adopts a delay-line controller for voltage regulation. With a proposed adaptive pulse-train technique, ripple voltages are reduced by 50%, while the converter still maintains satisfying transient response. With a supply voltage of 3.3V, the output of the converter is well regulated from 1.7 to 3.0V. Power consumption of the controller is below 100 μW. Maximum efficiency of 92% is achieved with output power of 125mW. Chip area is 0.8 × 1.2mm2 in 1.5 μm standard CMOS process.
Keywords :
CMOS integrated circuits; DC-DC power convertors; PWM power convertors; SPICE; delay lines; low-power electronics; power supply circuits; transient response; voltage control; 1.7 to 3.0 V; 125 mW; 3.3 V; CMOS process; HSPICE; adaptive pulse-train technique; adjustable output voltage; delay-line controller; dynamic voltage scaling; integrated adaptive DC-DC conversion; internal control signal; low power integrated circuits; low-power design; low-ripple fast-response regulation; on-chip adaptive converter; pulse width modulation circuit; transient response; voltage regulation; Adaptive control; Adaptive systems; DC-DC power converters; Delay; Digital integrated circuits; Dynamic voltage scaling; Modems; Programmable control; System-on-a-chip; Voltage control;
Conference_Titel :
Low Power Electronics and Design, 2004. ISLPED '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
1-58113-929-2
DOI :
10.1109/LPE.2004.1349347
