A 10 b, 100 Ms/s pipelined A/D converter

An ADC (analog-to-digital converter) that is fabricated in an oxide-isolated bipolar process offering 4-GHz n-p-n transistors at the low bias currents used throughout is described. The two-step subranging architecture consists of a 4-b coarse quantizer, followed by a 7-b fine quantizer. The ratio of signal to noise plus distortion and the spurious free dynamic range are measured for full-scale sinusoidal inputs up to 50 MHz, verifying conversion at about 9 1/2 effective bits linearity at the highest input frequency. The performance is maintained to within +or-1 dB over the entire commercial temperature range.<>