• DocumentCode
    1699142
  • Title

    ESD protection circuit for 8.5Gbps I/Os in 90nm CMOS technology

  • Author

    Sarbishaei, H. ; Sachdev, M.

  • Author_Institution
    Dept of Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada
  • fYear
    2009
  • Firstpage
    697
  • Lastpage
    700
  • Abstract
    In this paper we designed an ESD protected CML driver for 8.5 Gbps data rate. ESD protection for this circuit is provided with DSCR. A detailed analysis is done on the impact of ESD protection on performance of the driver. It is shown that DSCR offers up to 2.7 kV HBM protection with very small impact on performance of the driver.
  • Keywords
    CMOS integrated circuits; electrostatic discharge; CMOS technology; ESD protection circuit; CMOS technology; Capacitance; Diodes; Driver circuits; Electrostatic discharge; Medical simulation; Operating systems; Protection; Testing; Thyristors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4244-4071-9
  • Electronic_ISBN
    978-1-4244-4073-3
  • Type

    conf

  • DOI
    10.1109/CICC.2009.5280729
  • Filename
    5280729
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1699142