A new 2.5-V CMOS 10.7-MHz IF circuit

This paper presents a low-voltage low-power 10.7-MHz IF circuit including limiting amplifier and FM/FSK demodulator. The limiting amplifier is implemented by cascaded of seven gain cells. The FM/FSK demodulator employs a new quadrature detector and is composed of an on-chip analog multiplier and an external tank phase shifter. The frequency to voltage conversion gain of the demodulator is 15 mVkHz. The sensitivity of the IF section including demodulator and limiting amplifier is -72 dBm. The current consumption of the proposed IF circuit is 4 mA from a single 2.5 V power supply. It occupies an active area of 580 μm X 1300 μm using 0.25-μm TSMC SP5M CMOS technology.