Title :
Electrical modeling and measuring inductance in the Micro Lead Chip Carrier
Author :
Ho, Ka M. ; Rebelo, Ashley ; Caggiano, Michael F. ; Gilbert, Jeffery
Author_Institution :
Dept. of Electr. & Comput. Eng., Rutgers Univ., Piscataway, NJ, USA
fDate :
6/24/1905 12:00:00 AM
Abstract :
The Micro Lead Chip Carrier is a fine pitch package with low electrical parasitics due to its small size and consequently short conductive paths. This makes the package ideal for such RF applications as personal wireless communications. Several lead count packages were modeled using a rapid solution computer program developed at Rutgers University as well as a commercially available 3D solver program. Finally the same packages were measured using a Vector Network Analyzer. The results of the two sets of simulations and the measurements are compared and will be presented.
Keywords :
electronic engineering computing; fine-pitch technology; inductance measurement; lead bonding; network analysers; packaging; 1 GHz; 3D solver program; RF applications; bond wires; electrical modeling; fine pitch package; inductance measurement; lead count packages; low electrical parasitics; micro lead chip carrier; personal wireless communications; rapid solution computer program; short conductive paths; vector network analyzer; Bonding; Calibration; Electric variables measurement; Fixtures; Impedance measurement; Inductance measurement; Packaging; Performance evaluation; Semiconductor device measurement; Wire;
Conference_Titel :
Electronic Components and Technology Conference, 2002. Proceedings. 52nd
Print_ISBN :
0-7803-7430-4
DOI :
10.1109/ECTC.2002.1008342
