Title :
A 64-PE folded-torus intra-chip communication fabric for guaranteed throughput in Network-on-Chip based applications
Author :
Pham, Phi-Hung ; Mau, Phuong ; Kim, Chulwoo
Author_Institution :
Korea Univ., Seoul, South Korea
Abstract :
This paper presents the design of a 64-PE folded-torus intra-chip communication fabric used to provide guaranteed throughput in terms of dead- and live-lock free and in-order data delivery, which is suitable for NoC-based real-time processing applications. A test chip using the proposed intra-chip communication fabric designed to integrate 64 RISC-based processing elements is fabricated in 1P6M 0.13 mum CMOS technology with 23 mm2 die area. At room temperature, the measured peak power (all PE-tiles activated) of the test chip is 200 mW @ 128 MHz at 1.2 Vcc. The intra-chip network consuming 9. 4% the chip area and 18% of the total chip power can provide a maximum bisection bandwidth of 44.6 Gb/s with an approximate energy per transported bit of 0.14 pJ/bit/hop.
Keywords :
CMOS integrated circuits; network-on-chip; reduced instruction set computing; 1P6M 0.13 mum CMOS technology; 64-PE folded-torus intra-chip communication fabric; RISC-based processing elements; dead-lock free data delivery; frequency 128 MHz; guaranteed throughput; in-order data delivery; live-lock free data delivery; network-on-chip; power 200 mW; size 0.13 mum; test chip; voltage 1.2 V; Bandwidth; CMOS process; CMOS technology; Fabrics; Network-on-a-chip; Power measurement; Semiconductor device measurement; Temperature measurement; Testing; Throughput;
Conference_Titel :
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-4071-9
Electronic_ISBN :
978-1-4244-4073-3
DOI :
10.1109/CICC.2009.5280748