Title :
A fast and power-saving self-timed Manchester carry-bypass adder for Booth multiplier-accumulator design
Author :
Wey, I-Chyn ; Chow, Hwang-Cherng ; Chen, You-Gang ; An-Yeu Wen
Author_Institution :
Graduate Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
In this paper, a fast and power-saving self-timed Manchester Carry-Bypass Adder (MCBA) is proposed based on the property analysis of the MCBA completion signal. By using a new self-timed approach, the critical path in the summation array of Multiplier-Accumulator (MAC) can be removed without conventional dual MCBA chain circuit. As a result, the speed of the proposed self-timed MCBA can be improved 23.3% and save 56.8% power consumption. Finally, a 16-bit 16-bit+40-bit Booth MAC with this new self-timed MCBA is demonstrated at 2.5V, 150MHz in UMC 0.25μm process with 71.28mW power only.
Keywords :
CMOS logic circuits; adders; carry logic; digital signal processing chips; low-power electronics; multiplying circuits; system-on-chip; 16 bit; 2.5 V; 71.28 mW; Booth encoding scheme; Booth multiplier-accumulator design; Wallace tree architecture; critical path removal; digital signal processors; fast power-saving adder; partial product generation scheme; self-timed Manchester carry-bypass adder; speed bottleneck; Acceleration; Adders; Circuit synthesis; Clocks; Delay; Design engineering; Digital signal processing; Energy consumption; Pipelines; Power generation;
Conference_Titel :
Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-8637-X
DOI :
10.1109/APASIC.2004.1349402
