DocumentCode
1699829
Title
A 1.4 MHz 0.21 mW MPEG-2/4 AAC single chip decoder
Author
Tsai, Tsung-Han ; Liu, Chun-Nan ; Lin, Hsueh-Yi ; Liu, Hsing-Chuang ; Wu, Chia-Ying
Author_Institution
Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan
fYear
2009
Firstpage
653
Lastpage
656
Abstract
A low power and full ASIC MPEG-2/4 AAC single chip decoder is presented. The decoding blocks are partitioned into four dedicated hardware modules with the complexity and operational type analysis. Through algorithm, architecture, RTL and circuit level lower power techniques, the proposed AAC decoder is operated at 1.4 MHz for the 44.1 KHz sampling frequency and consumes only 0.21 mW using TSMC 0.13 mum library.
Keywords
application specific integrated circuits; audio coding; decoding; MPEG-2/4 AAC single chip decoder; decoding blocks; frequency 1.4 MHz; frequency 44.1 kHz; power 0.21 mW; size 0.13 mum; Application specific integrated circuits; Decoding; Flowcharts; Frequency; Hardware; Libraries; Programmable logic arrays; Signal processing; Signal processing algorithms; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-4071-9
Electronic_ISBN
978-1-4244-4073-3
Type
conf
DOI
10.1109/CICC.2009.5280750
Filename
5280750
Link To Document