• DocumentCode
    1700123
  • Title

    An 8-bit 2-V 2-mW 0.25-mm2 CMOS DAC

  • Author

    Wang, Huei-Chi ; Kao, Hong-Sing ; Lee, Tai-Cheng

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • fYear
    2004
  • Firstpage
    102
  • Lastpage
    105
  • Abstract
    A low-voltage low-power small area digital-to-analog (DAC) for mixed-signal applications is introduced. A full equally weighted current steering DAC is a performance-efficient architecture for 8-bit resolution, due to almost all the current taken from the supply is used for the output signal. The current steering architecture is also highly suitable for high-speed operation and requires no calibration, trimming, or dynamic averaging. The circuit operates from a 2-V power supply in a standard 0.25 um CMOS technology. The measured DNL/INL is 0.23/0.3, and output 200-kHz signal achieves 50 dBc SFDR at 10 MS/s update rate with power dissipation of 2 mW.
  • Keywords
    CMOS integrated circuits; digital-analogue conversion; high-speed integrated circuits; low-power electronics; mixed analogue-digital integrated circuits; 2 V; 2 mW; 8 bit; CMOS DAC; CMOS technology; decoding latch logic; embedded applications; equally weighted current steering DAC; high-speed operation; low-voltage low-power DAC; mixed-signal applications; performance-efficient architecture; CMOS technology; Calibration; Capacitance; Circuits; Decoding; Feeds; Frequency domain analysis; Logic; Signal resolution; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on
  • Print_ISBN
    0-7803-8637-X
  • Type

    conf

  • DOI
    10.1109/APASIC.2004.1349418
  • Filename
    1349418