DocumentCode
1700267
Title
A 3-level PWM ADSL2+ CO line driver
Author
Gierkink, Sander ; Lakshmikumar, Kadaba ; Mukundagiri, Vinod ; Lim, Drahoslav ; Muralt, Arnold ; Larsen, Fred
Author_Institution
Conexant Syst. Inc., CA, USA
fYear
2009
Firstpage
543
Lastpage
546
Abstract
A PWM ADSL2+ line driver with 2.2 MHz signal bandwidth is realized in a 3 metal, 2 poly 0.35 mum CMOS process. A low 8.832 MHz switching frequency is used with filtering in the feedback path to suppress aliasing. Signal processing and triangular wave generation are combined in the forward integrators. The driver delivers 100 mW to a 100 Omega line with an MTPR less than -52 dB. Active area is 3 mm2.
Keywords
CMOS digital integrated circuits; digital subscriber lines; driver circuits; pulse width modulation; CMOS process; MTPR; PWM ADSL2+ central office line driver; feedback path filtering; frequency 2.2 MHz; frequency 8.832 MHz; pulse width modulation; signal processing; size 0.35 mum; switching frequency; triangular wave generation; Bandwidth; CMOS process; CMOS technology; Driver circuits; Feedback; Low pass filters; OFDM modulation; Pulse width modulation; Signal processing; Switching frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-4071-9
Electronic_ISBN
978-1-4244-4073-3
Type
conf
DOI
10.1109/CICC.2009.5280764
Filename
5280764
Link To Document