A DSP engine for an extensible media embedded processor

Author

Furusawa, Toshiyuki ; Katayama, Isao ; Arai, Yutaro ; Inoue, Satoshi ; Matsui, Masataka ; Nishikawa, Meisei ; Yoshimoto, Takeshi

Author_Institution

Toshiba Microelectron. Corp., Kanagawa, Japan

fYear

2004

Firstpage

160

Lastpage

163

Abstract

An extension interface for a configurable processor enabling implementation of an application specific programmable DSP is described. A DSP engine for mobile applications with 32-bit dual MAC architecture based on the extension was designed. The engine can also run separately as stand-alone processor decoupled with the configurable CPU core. A test chip was successfully fabricated using 0.13μm CMOS technology and has measured 0.23 mW/MHz for random logic of the engine and the core.

Keywords

CMOS digital integrated circuits; coprocessors; digital signal processing chips; programmable circuits; reduced instruction set computing; system-on-chip; CMOS technology; DSP engine; SoC; application specific programmable DSP; configurable RISC core; configurable processor; coprocessor; dual MAC architecture; extensible media embedded processor; random logic; stand-alone processor; CMOS technology; Control systems; Digital signal processing; Digital signal processing chips; Energy consumption; Engines; Ground penetrating radar; Logic testing; Registers; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on

Print_ISBN

0-7803-8637-X

Type

conf

DOI

10.1109/APASIC.2004.1349437

Filename

1349437