An integrated CMOS receiver chip for NMR-applications

Author

Anders, Jens ; SanGiorgio, Paul ; Boero, Giovanni

Author_Institution

Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland

fYear

2009

Firstpage

471

Lastpage

474

Abstract

We present the first CMOS-only receiver chip for NMR-applications at 300 MHz. The system consists of an on-chip reception coil, a tuning-capacitor, a downconversion-mixer and a low-frequency gain-stage as well as biasing and offset-compensation circuitry. It has an input referred voltage noise density of 0.7 nV/radicHz and a gain of 75 dB. The power consumption is 18 mA from a single 3.3 V supply. The chip is realized in 0.35 mum technology and occupies an area of 1200 times 850 mum².

Keywords

CMOS integrated circuits; UHF integrated circuits; biomedical MRI; capacitors; mixers (circuits); nuclear magnetic resonance; radio receivers; tuning; CMOS only receiver chip; NMR applications; current 18 mA; downconversion mixer; frequency 300 MHz; gain 75 dB; integrated CMOS receiver chip; low frequency gain stage; offset compensation circuitry; on chip reception coil; size 0.35 mum; tuning capacitor; voltage 3.3 V; Capacitors; Circuit noise; Coils; Frequency; Low-frequency noise; Magnetic fields; Magnetic resonance imaging; Nuclear magnetic resonance; Spectroscopy; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2009. CICC '09. IEEE

Conference_Location

San Jose, CA

Print_ISBN

978-1-4244-4071-9

Electronic_ISBN

978-1-4244-4073-3

Type

conf

DOI

10.1109/CICC.2009.5280786

Filename

5280786