AES coprocessor secure against power attacks

Low power consumption, low gate count and high throughput are standard design criteria for cryptogmphic coprocessors designated for smart cards. With the advent of side channel attacks, dewices´ resistance to such attacks became a maior zssue. Thzs paper descnbes a coprocessor for an Advanced EncnJptzon Standard that pmvzdes complete protectzon agaznst power analyrzs attacks by embeddzng data maskzng at a hardware level.