Title :
A digitized LVDS driver with simultaneous switching noise rejection
Author :
Wang, Hsin-Wen ; Lu, Hung-Wen ; Su, Chau-Chin
Author_Institution :
Dept. of Electr. Control Eng., Nat. Chiao-Tung Univ., Hsin-Chu, Taiwan
Abstract :
In this paper, a Digitized LVDS Driver with SSN (Simultaneous switching noise) rejection is proposed, which is fabricated by TSMC 0.18μm CMOS technology. First, the power consumption and chip area are greatly decreased due to the design of digitized driver but we suffered the SSN noise. Second, the method which modifies the driver´s control signal greatly reduces the ground bounce, and simultaneously solved the ground bound problem mentioned above. Third, the driver can calibrate the output differential mode by the control signal outside the chip by way of the controllable driver. According to the simulation results, ground bounce reduced from 175mV to 95mV, 55% diminished, and the measurement output jitter (pk-pk) is less than 48ps @1.25Gbps. The driver area is only 210μm × 210μm and power consumption is less than 19mW, which are extremely lower then the conventional LVDS Driver. The proposed programmable driver can also be applied to the 1.5Gbps Serial ATA standard or 2.5Gbps PCI-Express.
Keywords :
CMOS digital integrated circuits; buffer circuits; device drivers; low-power electronics; programmable circuits; system buses; CMOS technology; PCI-Express; Serial ATA standard; digitized LVDS driver; ground bounce; high-speed interface; output differential mode; programmable driver; simultaneous switching noise rejection; CMOS technology; Clocks; Driver circuits; Energy consumption; Frequency; Packaging; Parasitic capacitance; Power system transients; Switches; Voltage;
Conference_Titel :
Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-8637-X
DOI :
10.1109/APASIC.2004.1349460