Title :
A low-complexity method for distributed clocking on digital ASICs
Author :
Olsson, Thomas ; Nilsson, Peter
Author_Institution :
Dept. of Electroscience, Lund Univ., Sweden
Abstract :
A low-complexity method using synchronous wrappers is proposed to simplify communication between modules using unsynchronized clocks. To test the method, it is implemented together with a divider and an FFT co-processor. The divider with synchronous wrapper and local clock generator, delivering a 500 MHz clock, is synthesized and verified using post-synthesis simulations for a 0.18 μm 1.8 V CMOS technology. A complete description of the wrapper in synthesizable VHDL-code including local a local clock generator makes the method portable between technologies.
Keywords :
CMOS logic circuits; application specific integrated circuits; circuit complexity; clocks; hardware description languages; integrated circuit design; logic CAD; microprocessor chips; sequential circuits; synchronisation; system-on-chip; 1.8 V; CMOS technology; FFT coprocessor; VHDL-code; digital ASIC; distributed clocking; divider; large SoC; local clock generator; low-complexity method; post-synthesis simulation; synchronous wrappers; unsynchronized clocks; CMOS technology; Clocks; Coprocessors; Delay; Discrete cosine transforms; Hardware; Interference; Synchronous generators; Testing; Time to market;
Conference_Titel :
Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-8637-X
DOI :
10.1109/APASIC.2004.1349492
