A novel on-chip voltage generator for low voltage DRAMs and PRAMs

A novel on-chip voltage generator suitable for low voltage operation has been developed and demonstrated through a 128 Mb PRAM test chip using 72 nm CMOS process. It features three key circuit techniques as follows: 1) a cross charge pump circuit with a shift charge method , which generates VPP supply current larger over 35% than conventional pump circuits, 2) an incidental pumping scheme, which suppresses VPP fluctuation by 50 mV and reduces pump circuits area by about 25% for the conventional scheme by dispersing the pump operation, 3) a dual regulator scheme, which reduces the consumption current of the regulator in active mode to less than 1/3 in comparison with the conventional scheme while maintaining enough supply current.