Title :
Digital wireline and PLL techniques
Author :
Wei, Gu-Yeon ; Momtaz, Afshin
Author_Institution :
Harvard University, USA
Abstract :
Trends in deeply-scaled CMOS technology motivate designers to carefully consider using more digital circuitry and digital control techniques for high-speed wireline transceivers and related building blocks. This session presents recent developments in the design and analysis of various digital approaches.
Keywords :
CMOS digital integrated circuits; CMOS technology; Digital control; Phase locked loops; Transceivers;
Conference_Titel :
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location :
San Jose, CA, USA
Print_ISBN :
978-1-4244-4071-9
Electronic_ISBN :
978-1-4244-4073-3
DOI :
10.1109/CICC.2009.5280829
