DocumentCode :
170204
Title :
Concurrent online BIST for sequential circuits exploiting input reduction and output space compaction
Author :
Voyiatzis, Ioannis
Author_Institution :
Dept. of Inf., Technol. Educ. Inst. of Athens, Athens, Greece
fYear :
2014
fDate :
26-30 May 2014
Firstpage :
1
Lastpage :
2
Abstract :
In this work, we combine the input vector monitoring concurrent BIST paradigm with input reduction (in order to reduce the Concurrent Test Latency) and Space Compaction of the output responses (in order to reduce the hardware overhead) and examine its implementation on the concurrent testing of sequential modules.
Keywords :
built-in self test; concurrent engineering; logic testing; sequential circuits; concurrent online BIST; concurrent test latency; concurrent testing; hardware overhead; input reduction; input vector monitoring; output space compaction; sequential circuits; sequential modules; Benchmark testing; Built-in self-test; Compaction; Europe; Monitoring; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium (ETS), 2014 19th IEEE European
Conference_Location :
Paderborn
Type :
conf
DOI :
10.1109/ETS.2014.6847846
Filename :
6847846
Link To Document :
بازگشت