DocumentCode
1702110
Title
ADC-based serial I/O receivers
Author
Yang, Chih-Kong Ken ; Chen, E-Hung
Author_Institution
Univ. of California, Los Angeles, Los Angeles, CA, USA
fYear
2009
Firstpage
323
Lastpage
330
Abstract
Fully digital receiver frontends have garnered interest for serial I/O receivers. While the speed and resolution are achievable in CMOS technologies, the challenge is to achieve low power dissipation so that the I/O links can be integrated in large ASICs. This paper describes different design techniques and shows that the power can be reduced by constraining the specifications and by making architectural trade-offs.
Keywords
CMOS digital integrated circuits; analogue-digital conversion; application specific integrated circuits; low-power electronics; radio receivers; ASIC; CMOS technology; I/O links; analog-digital conversion; digital receiver; low power dissipation; serial I/O receivers; CMOS technology; Power dissipation; analog-to-digital converter; serial I/O; wireline receiver;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-4071-9
Electronic_ISBN
978-1-4244-4073-3
Type
conf
DOI
10.1109/CICC.2009.5280831
Filename
5280831
Link To Document