Title :
A 60 GHz CMOS balanced downconversion mixer with a layout efficient 90° hybrid coupler
Author :
Amaya, R.E. ; Verver, Cornelius J.
Author_Institution :
Commun. Res. Centre, Ottawa, ON, Canada
Abstract :
This paper presents the design and realization of a downconversion mixer fabricated in a standard 130 nm commercial CMOS process and aimed at applications in the 60 GHz ISM band. A balanced mixer configuration was implemented using a layout efficient 90deg hybrid coupler which serves as a diplexer to inject the LO signal while also providing two outputs with 3 dB of attenuation and 90deg phase shift. The mixer achieves a conversion gain of +0.3 dB and an OIP3 of +2.3 dBm. The mixer also consumes 200 muA of DC current and 8 mA of peak current while driven from a single 2 V supply. The layout area, including test pads, is 1.4 mm times 1.0 mm.
Keywords :
CMOS integrated circuits; integrated circuit design; integrated circuit manufacture; millimetre wave integrated circuits; mixers (circuits); CMOS balanced downconversion mixer; LO signal; current 200 muA; current 8 mA; design; diplexer; frequency 60 GHz; hybrid coupler; size 130 nm; voltage 2 V; Attenuation; CMOS process; Gain; Testing;
Conference_Titel :
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-4071-9
Electronic_ISBN :
978-1-4244-4073-3
DOI :
10.1109/CICC.2009.5280847
