DocumentCode :
1703582
Title :
Design-for-manufacturing features in nanometer logic processes - a reverse engineering perspective
Author :
James, Dick
Author_Institution :
Chipworks Inc., Ottawa, ON, Canada
fYear :
2009
Firstpage :
207
Lastpage :
210
Abstract :
The first decade of the new millennium has seen the introduction of a suite of production disciplines known collectively as design for manufacturability (DFM). While there has been no formal definition of DFM, we can regard it broadly as the techniques used to co-optimise design, layout, and processing to reduce variability and improve manufacturing parameters, with the aim of increasing yield and reliability. Retrospectively, we can view design rule checking, and the dummy features used to improve CMP, as early forms of DFM. However, the changes in process and the introduction of new materials in the latest product generations have presented huge challenges to the industry and forced a closer integration of design, layout, process, and manufacturing within and across companies the tribal boundaries are disappearing! Chipworks, as a supplier of competitive intelligence to the semiconductor and electronics industries, monitors the evolution of chip technologies as they come into commercial production. Chipworks has obtained parts from the leading edge manufacturers, and performed structural and layout analyses to examine the features and manufacturing processes of the devices. This paper illustrates some of the different layout features we have interpreted as examples of DFM in some 65 and 45-nm products analyzed in the last few years.
Keywords :
design for manufacture; nanotechnology; reverse engineering; Chipworks; competitive intelligence; design-for-manufacturing; nanometer logic process; reverse engineering; size 45 nm; size 65 nm; Competitive intelligence; Design for manufacture; Logic design; Manufacturing industries; Manufacturing processes; Process design; Production; Reverse engineering; Semiconductor device manufacture; Semiconductor materials;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-4071-9
Electronic_ISBN :
978-1-4244-4073-3
Type :
conf
DOI :
10.1109/CICC.2009.5280880
Filename :
5280880
Link To Document :
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