Title :
The impact of process-induced mechanical stress on d-latch timing performance
Author :
Sharma, Arvind Kumar ; Alam, Naushad ; Anand, B. ; Dasgnpta, S.
Author_Institution :
ECE Dept., IIT Roorkee, Roorkee, India
Abstract :
In this work we studied the impact of number of fingers in strain engineered MFGSs on the performance of sequential circuits designed using multi-finger gate structures (MFGSs) and following different layout scenarios. We studied the stress induced in the channel of MFGSs by decoupling different stress sources and dependence of channel stress on the layout of gate structures. Subsequently we study the layout dependent effect (LDE) variability due to the use of stressors. We study the impact of LDE variability on the set-up time of static and dynamic latches. We observe that the set-up time changes by ~15% when the number of fingers is increased from from one to ten in MFGSs. We observe that the use of dummy poly reduces the variability due to stressors though, at the cost of area and performance.
Keywords :
flip-flops; integrated circuit layout; sequential circuits; LDE variability; channel stress; d-latch timing performance; dummy poly; dynamic latches; layout dependent effect variability; multifinger gate structures; process-induced mechanical stress; sequential circuits; set-up time; static latches; strain engineered MFGS; stress sources; Clocks; Latches; Layout; MOSFET circuits; Stress; Thumb;
Conference_Titel :
Multimedia, Signal Processing and Communication Technologies (IMPACT), 2013 International Conference on
Conference_Location :
Aligarh
Print_ISBN :
978-1-4799-1202-5
DOI :
10.1109/MSPCT.2013.6782121