An alternative doping technique of polysilicon gate for sub-micron CMOS/BiCMOS devices

This paper presents alternative techniques of polysilicon doping using POCl₃ and ion implantation for gate electrode of sub-micron CMOS/BiCMOS devices during the technology transfer to local fab. The in-situ doping sheet resistance (Rs) value is use as a reference at range of 20 to 25 Ω/□. The polysilicon gate sheet resistance (Rs) obtain from both techniques were analyzed. The result shows that both techniques give the required polysilicon gate sheet resistance at 24 to 30 Ω/□ and close to the range of using in-situ doping technique. The Rs for both techniques can be improved further by increasing the POCl₃ process temperature and higher the ion implantation dose rate. However, the ion implantation technique were recommended to be used at local fab because of it will eliminate the use of using high temperature treatment process as well as reducing the thermal effect to the device.