DocumentCode :
1704348
Title :
Fault insertion methodology
Author :
Parsons, W. ; Zimmerman, Terry
Author_Institution :
Harris Corp., Winter Park, FL, USA
fYear :
1988
Firstpage :
119
Lastpage :
123
Abstract :
Relevant procedures, information, and guidelines are presented to validate and verify the effectiveness of a test program. The major areas of discussion are the test-program development sequence, component stress, and fault-insertion guidelines. Fault insertion, defined as the temporary installation of component and pin fault failures in a unit under test (UUT), can be destructive to the UUT, interface adaptor, or automatic test equipment (ATE) used, and can also be hazardous to the ATE operator. A methodology that minimizes these unwanted results is presented
Keywords :
automatic test equipment; electronic equipment testing; fault location; program verification; automatic test equipment; component stress; fault-insertion guidelines; interface adaptor; pin fault failures; test program verification; test-program development sequence; unit under test; Circuit faults; Coils; Contracts; Diodes; Failure analysis; Fault detection; Guidelines; Resistors; Silicon; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
AUTOTESTCON '88. IEEE International Automatic Testing Conference, Futuretest. Symposium Proceedings
Conference_Location :
Minneapolis, MN
Type :
conf
DOI :
10.1109/AUTEST.1988.9596
Filename :
9596
Link To Document :
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