DocumentCode :
1705010
Title :
Co-scheduling hardware and software pipelines
Author :
Govindarajan, R. ; Altman, Erik R. ; Gao, Guang R.
Author_Institution :
Supercomput. Educ. & Res. Centre, Indian Inst. of Sci., Bangalore, India
fYear :
1996
Firstpage :
52
Lastpage :
61
Abstract :
In this paper we propose co-scheduling, a framework for simultaneous design of hardware pipelines structures and software-pipelined schedules. Two important components of the co-scheduling framework are: (1) An extension to the analysis of hardware pipeline design that meets the needs of periodic (or software pipelined) schedules. Reservation tables, forbidden latencies, collision vectors, and state diagrams from classical pipeline theory are revisited and extended to solve the new problems. (2) An efficient method, based on the above extension of pipeline analysis, to perform (a) software pipeline scheduling and (b) hardware pipeline reconfiguration which are mutually “compatible”. The proposed method has been implemented and preliminary experimental results for 1008 kernel loops are reported. Co-scheduling successfully obtains a schedule for 95% of these loops. The median time to obtain these schedules is 0.25 seconds on a Sparc-20
Keywords :
parallel architectures; performance evaluation; pipeline processing; Sparc-20; classical pipeline theory; collision vectors; coscheduling hardware/software pipelines; forbidden latencies; hardware pipeline reconfiguration; reservation tables; simultaneous design; software pipeline scheduling; state diagrams; Arithmetic; Cathode ray tubes; Computer architecture; Computer science education; Hardware; Hazards; Pipeline processing; Processor scheduling; Software performance; Supercomputers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High-Performance Computer Architecture, 1996. Proceedings., Second International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
0-8186-7237-4
Type :
conf
DOI :
10.1109/HPCA.1996.501173
Filename :
501173
Link To Document :
بازگشت