DocumentCode :
1705036
Title :
Enhanced trellis extracted synchronisation technique for practical implementation
Author :
Lund, D. ; Honary, B.
Author_Institution :
Commun. Res. Centre, Lancaster Univ., UK
fYear :
1999
fDate :
6/21/1905 12:00:00 AM
Firstpage :
42491
Lastpage :
42495
Abstract :
Intrinsic synchronisation algorithms increase the data throughput of a system at the expense of processing. The trellis extracted synchronisation technique (TEST) is an intrinsic synchronisation algorithm for the combined decoding and synchronisation of error control block codes. This paper illustrates two enhancements to the TEST algorithm which improves synchronisation performance and reduces processing. Inherent errors due to the linearity and cyclic properties of block codes are corrected. A simple estimate of future synchronisation points in a data stream can be efficiently used to decrease the processing with no expense of coding performance
Keywords :
decoding; TEST; combined decoding synchronisation; cyclic properties; data stream; data throughput; enhanced trellis extracted synchronisation technique; error control block codes; intrinsic synchronisation algorithm; linearity;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Novel DSP Algorithms and Architectures for Radio Systems (1999/184), IEE Colloquium on
Conference_Location :
London
Type :
conf
DOI :
10.1049/ic:19990847
Filename :
828767
Link To Document :
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