Title :
CMOS switched-op amp based sample-and-hold circuit
Author :
Dai, Liang ; Harjani, Ramesh
Author_Institution :
Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA
Abstract :
This paper presents a sample-and-hold design that is based on a switched-op amp. By using a switched-opamp topology charge injection errors are greatly reduced by turning off the transistors in saturation instead of triode region. A pseudo-differential topology is used to cancel the remaining signal independent clock feedthrough error. Switched op amps with differential pairs in both weak inversion and strong inversion are designed. Detailed simulation and measurement results of a switched-opamp based sample and hold circuit is used to show its performance superiority over traditional switched capacitor topologies
Keywords :
switched networks; CMOS switched-op amp sample-and-hold circuit; charge injection error; clock feedthrough error; pseudo-differential topology; Capacitance; Circuit topology; Clocks; Equations; MOS capacitors; MOSFETs; Switched capacitor circuits; Switches; Switching circuits; Voltage;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.704500
