DocumentCode :
1705422
Title :
Power optimization in data-path scheduling and binding with multiple supply voltages and threshold voltages by simulated annealing
Author :
Huang, Jianfeng ; Bian, Jinian ; Liu, Zhipeng ; Wang, Yunfeng
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Volume :
2
fYear :
2005
Lastpage :
1374
Abstract :
We present a scheme to optimize power consumption in data-path scheduling and binding with resources operating at multiple supply voltages and threshold voltages by simulated annealing. The proposed scheme considers both scheduling and binding simultaneously such that we have a wider solution space to explore and a solution with much lower power can be obtained. Besides, we give a more accurate high-level power model so that not only the dynamic and leakage power of function units but also the sharing of function units is taken into account. Experimental results on a number of high-level benchmark circuits using three supply voltage and threshold voltage levels show that an average power saving of about 68% can be obtained compared to using a single supply and threshold voltage level (with a time constraint of 1.2 times the critical path delay and a resource constraint of two function units of each type).
Keywords :
circuit optimisation; integrated circuit design; power consumption; scheduling; simulated annealing; binding; data-path scheduling; dynamic power; function unit sharing; leakage power; multiple supply voltages; power consumption; power optimization; simulated annealing; threshold voltages; Circuits; Computational modeling; Computer simulation; Dynamic voltage scaling; Energy consumption; Processor scheduling; Simulated annealing; Space exploration; Threshold voltage; Time factors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Circuits and Systems, 2005. Proceedings. 2005 International Conference on
Print_ISBN :
0-7803-9015-6
Type :
conf
DOI :
10.1109/ICCCAS.2005.1495361
Filename :
1495361
Link To Document :
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