• DocumentCode
    1705459
  • Title

    A 646GOPS/W multi-classifier many-core processor with cortex-like architecture for super-resolution recognition

  • Author

    Junyoung Park ; Injoon Hong ; Gyeonghoon Kim ; Youchang Kim ; Kyuho Lee ; Seongwook Park ; Kyeongryeol Bong ; Hoi-Jun Yoo

  • Author_Institution
    KAIST, Daejeon, South Korea
  • fYear
    2013
  • Firstpage
    168
  • Lastpage
    169
  • Abstract
    Object recognition processors have been reported for the applications of autonomic vehicle navigation, smart surveillance and unmanned air vehicles (UAVs) [1-3]. Most of the processors adopt a single classifier rather than multiple classifiers even though multi-classifier systems (MCSs) offer more accurate recognition with higher robustness [4]. In addition, MCSs can incorporate the human vision system (HVS) recognition architecture to reduce computational requirements and enhance recognition accuracy. For example, HMAX models the exact hierarchical architecture of the HVS for improved recognition accuracy [5]. Compared with SIFT, known to have the best recognition accuracy based on local features extracted from the object [6], HMAX can recognize an object based on global features by template matching and a maximum-pooling operation without feature segmentation. In this paper we present a multi-classifier many-core processor combining the HMAX and SIFT approaches on a single chip. Through the combined approach, the system can: 1) pay attention to the target object directly with global context consideration, including complicated background or camouflaging obstacles, 2) utilize the super-resolution algorithm to recognize highly blurred or small size objects, and 3) recognize more than 200 objects in real-time by context-aware feature matching.
  • Keywords
    feature extraction; image matching; image resolution; microprocessor chips; multiprocessing systems; object recognition; HMAX models; HVS recognition architecture; MCS; SIFT approaches; UAV; autonomic vehicle navigation; camouflaging obstacles; context-aware feature matching; hierarchical architecture; human vision system; maximum-pooling operation; multiclassifier many-core processor; multiclassifier systems; object recognition processors; small size object recognition; smart surveillance; super-resolution recognition algorithm; template matching; unmanned air vehicles; Accuracy; Computer architecture; Engines; Feature extraction; Object recognition; Program processors; Real-time systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4673-4515-6
  • Type

    conf

  • DOI
    10.1109/ISSCC.2013.6487685
  • Filename
    6487685