DocumentCode
1705931
Title
SLOPE: a test pattern generator based on stop line oriented path end algorithm
Author
Chuang, Shih-Jen ; Lee, Chung-Len ; Shen, Wen-Zen ; Jen, Chein-Wei ; Chen, Jwu-E ; Jing, S.-C. ; Chen, Ming-Der
Author_Institution
Inst. of Electron., Nat. Chiao Tung Univ., Hsin Chu, Taiwan
fYear
1988
Firstpage
437
Abstract
The authors present a test pattern generator, SLOPE, based on the stop line oriented path end algorithm, for combinational digital circuits. It combines the advantages of FAN and FAST by utilizing a controllability measure and observability measure to assist guessing in the test generation process. With some strategies adopted in the algorithm, it generates tests with fewer number of backtrackings. Benchmark circuits run with SLOPE show that it outperforms PODEM and FAN for most circuits.<>
Keywords
combinatorial circuits; logic testing; FAN; FAST; PODEM; backtrackings; combinational digital circuits; controllability measure; guessing; observability measure; stop line oriented path end algorithm; test pattern generator; Circuit faults; Circuit testing; Controllability; Logic circuits; Observability; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo, Finland
Type
conf
DOI
10.1109/ISCAS.1988.14958
Filename
14958
Link To Document