Title :
A communication model and partitioning algorithm for streaming applications for an embedded MPSoC
Author :
Kelly, W. ; Flasskamp, M. ; Sievers, G. ; Ax, J. ; Jianing Chen ; Klarhorst, C. ; Ragg, C. ; Jungeblut, T. ; Sorensen, A.
Author_Institution :
Sci. & Eng. Fac., Queensland Univ. of Technol., Brisbane, QLD, Australia
Abstract :
Energy efficient embedded computing enables new application scenarios in mobile devices like software-defined radio and video processing. The hierarchical multiprocessor considered in this work may contain dozens or hundreds of resource efficient VLIW CPUs. Programming this number of CPU cores is a complex task requiring compiler support. The stream programming paradigm provides beneficial properties that help to support automatic partitioning. This work describes a compiler for streaming applications targeting the self-build hierarchical CoreVA-MPSoC multiprocessor platform. The compiler is supported by a programming model that is tailored to fit the streaming programming paradigm. We present a novel simulated-annealing (SA) based partitioning algorithm, called Smart SA. The overall speedup of Smart SA is 12.84 for an MPSoC with 16 CPU cores compared to a single CPU implementation. Comparison with a state of the art partitioning algorithm shows an average performance improvement of 34.07%.
Keywords :
embedded systems; energy conservation; instruction sets; low-power electronics; microprocessor chips; multiprocessing systems; simulated annealing; CPU cores; VLIW CPU; automatic partitioning; communication model; compiler support; embedded MPSoC; embedded computing; energy efficiency; hierarchical CoreVA-MPSoC multiprocessor platform; hierarchical multiprocessor; multiprocessor system-on-chip; partitioning algorithm; programming model; resource efficiency; simulated annealing; smart SA; software-defined radio; stream programming paradigm; streaming applications; video processing; Computer architecture; Parallel processing; Partitioning algorithms; Pipelines; Program processors; Signal processing algorithms; Simulated annealing;
Conference_Titel :
System-on-Chip (SoC), 2014 International Symposium on
Conference_Location :
Tampere
DOI :
10.1109/ISSOC.2014.6972436
