Low-voltage low-power double bulk mixer for direct conversion receiver in 65nm CMOS

Author

Schweiger, Kurt ; Uhrmann, Heimo ; Zimmermann, Horst

Author_Institution

Inst. of Electr. Meas. & Circuit Design, Vienna Univ. of Technol., Vienna

fYear

2009

Firstpage

74

Lastpage

77

Abstract

An innovative design with simulation results of a low-voltage bulk driven mixer for direct conversion receiver is presented. The circuit is designed in a 65 nm digital CMOS process without analog extensions. It offers a conversion gain of 22 dB at a clock frequency of 1.5 GHz for GALILEO/GPS applications. The design is capable of operating at up to 7 GHz with only 3 dB gain decrease. The simulated noise figure is 27 dB with a power consumption of 730 muW. Simulations at a supply voltage of 0.9 V instead of 1.2 V show a gain decrease of only 3 dB while the noise figure increases by 2 dB.

Keywords

CMOS digital integrated circuits; integrated circuit design; mixers (circuits); radio receivers; GALILEO-GPS application; circuit design; digital CMOS process; direct conversion receiver; frequency 1.5 GHz; low-voltage low-power double bulk mixer; noise figure 2 dB; noise figure 27 dB; power 730 muW; voltage 0.9 V; voltage 1.2 V; wavelength 65 nm; CMOS process; Circuit simulation; Clocks; Energy consumption; Frequency conversion; Gain; Global Positioning System; Mixers; Noise figure; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Design and Diagnostics of Electronic Circuits & Systems, 2009. DDECS '09. 12th International Symposium on

Conference_Location

Liberec

Print_ISBN

978-1-4244-3341-4

Electronic_ISBN

978-1-4244-3340-7

Type

conf

DOI

10.1109/DDECS.2009.5012102

Filename

5012102