Title :
Retargetable automatic generation of compound instructions for CGRA based reconfigurable processor applications
Author :
Miniskar, Narasinga Rao ; Kohli, Shruti ; Haewoo Park ; Donghoon Yoo
Author_Institution :
SAIT, Samsung R&D Inst., Bangalore, India
Abstract :
Reconfigurable processors such as SRP (Samsung Reconfigurable Processors) have become increasingly important, which enables just enough flexibility of accepting software solutions and providing application specific hardware configurability for faster time-to-market, lower development cost and higher performance while maintaining lower energy consumption and area. The reconfigurable processor compilation framework supports wide range of architectures through architecture description template for different domains of applications such as image processing, multimedia, video, and graphics. These architectures support several domain specific compound instructions (also called as intrinsics), which are computationally efficient when compared to the set of general instructions in the processor. Application developers have to use these intrinsics in their programs according to the architecture, which can result very inefficient usage, tedious and more error-prone. More-over, the intrinsics provided by the architecture need constant reference to the intrinsics file during development. In this paper, we propose a retargetable novel methodology for the automatic generation of compound instructions for a given architecture and application source code at compile time. Our approach is able to consider ~75% of total intrinsics in the architectures with the success rate of > 90% in identifying the intrinsics in the benchmarks such as AVC OpenGL Full Engine and OpenGL Vector benchmarks.
Keywords :
instruction sets; program compilers; reconfigurable architectures; CGRA; LLVM compiler; SRP; Samsung reconfigurable processors; architecture description template; coarse grain reconfigurable array; compound instructions; retargetable automatic generation; Cloning; Compounds; Computer architecture; Pattern matching; Software; VLIW; Vectors;
Conference_Titel :
Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2014 International Conference on
Conference_Location :
Jaypee Greens
DOI :
10.1145/2656106.2656125