• DocumentCode
    1706933
  • Title

    An approach for genetic synthesizer of binary decision diagram

  • Author

    Sakanashi, Hidenori ; Higuchi, Tetsuya ; Iba, Hitoshi ; Kakazu, Yukinori

  • Author_Institution
    Complex Syst. Eng., Hokkaido Univ., Sapporo, Japan
  • fYear
    1996
  • Firstpage
    559
  • Lastpage
    564
  • Abstract
    This paper describes the process of hardware evolution by genetic programming (GP). Hardware descriptions specified using binary decision diagrams (BDD) are evolved by genetic programming operators to synthesize various combinatorial logic circuits. By adopting BDDs as hardware representation, larger circuits are evolved and their verification is performed easily by utilizing commercial CAD software
  • Keywords
    combinational circuits; diagrams; formal verification; genetic algorithms; hardware description languages; logic CAD; binary decision diagram; circuit verification; combinatorial logic circuit design; genetic programming; genetic synthesizer; hardware descriptions; hardware evolution; hardware representation; logic CAD; Artificial neural networks; Binary decision diagrams; Boolean functions; Circuit synthesis; Data structures; Genetic programming; Hardware; Laboratories; Machine learning; Synthesizers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Evolutionary Computation, 1996., Proceedings of IEEE International Conference on
  • Conference_Location
    Nagoya
  • Print_ISBN
    0-7803-2902-3
  • Type

    conf

  • DOI
    10.1109/ICEC.1996.542660
  • Filename
    542660