Title :
A fully integrated 2×2 b/g and 1×2 a-band MIMO WLAN SoC in 45nm CMOS for multi-radio IC
Author :
Kumar, Ravindra ; Krishnaswamy, T. ; Rajendran, Gnanathusharan ; Sahu, Deepak ; Sivadas, A. ; Nandigam, M. ; Ganeshan, S. ; Datla, S. ; Kudari, A. ; Bhasin, H. ; Agrawal, Meena ; Narayan, S. ; Dharwekar, Y. ; Garg, Radhika ; Edayath, V. ; Suseela, T. ; Ja
Author_Institution :
Texas Instrum., Bangalore, India
Abstract :
A significant increase in Smartphones and tablets with embedded Wi-Fi demands a low-cost system solution. In this paper the RF core of an 802.11n 2×2 b/g band, 2×1 a-band MIMO WLAN SoC with die area of 3.83mm2 in 45nm CMOS is described. As shown in Fig. 19.1.1 the SoC has integrated Power Amplifier (PA) for both bands and T/R switch in b/g band, eliminating the need for an expensive external Front-End Module. The LO is synthesized by a two-step DLL-PLL architecture to meet the stringent phase-noise requirements.
Keywords :
CMOS digital integrated circuits; MIMO communication; delay lock loops; phase locked loops; phase noise; power amplifiers; system-on-chip; wireless LAN; CMOS; LO; RF core; T-R switch; embedded Wi-Fi demands; fully-integrated a-band MIMO WLAN SoC; fully-integrated b-band MIMO WLAN SoC; fully-integrated g-band MIMO WLAN SoC; integrated power amplifier; low-cost system solution; multiradio IC; phase-noise requirements; smart phones; tablets; two-step DLL-PLL architecture; MIMO; Mixers; Noise; Phase locked loops; Switches; System-on-chip; Wireless LAN;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4673-4515-6
DOI :
10.1109/ISSCC.2013.6487755
