DocumentCode
1707743
Title
New design of a MAP/BCJR decoder
Author
Sabeti, Leila ; Ahmadi, Majid ; Tepe, Kemal
Author_Institution
RCIM Lab., Windsor Univ., Ont., Canada
Volume
3
fYear
2004
Firstpage
1773
Abstract
In this paper, a new design of a MAP decoder suitable for ASIC is explained. Quantization of the inputs to the chip is studied and a better quantization with minimum possible number of bits and reliable bit error rate (BER) is chosen for each input based on the simulation results. Max-Log-MAP algorithm used for this purpose is a good compromise between performance and complexity.
Keywords
application specific integrated circuits; circuit complexity; circuit simulation; error statistics; integrated circuit design; maximum likelihood decoding; quantisation (signal); turbo codes; ASIC; BER; MAP/BCJR decoder design; Max-Log-MAP algorithm; chip input quantization; complexity; minimum bit numbers; normalization; reliable bit error rate; simulation; Algorithm design and analysis; Application specific integrated circuits; Approximation algorithms; Bit error rate; Data systems; Decoding; Performance loss; Probability; Quantization; Turbo codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2004. Canadian Conference on
ISSN
0840-7789
Print_ISBN
0-7803-8253-6
Type
conf
DOI
10.1109/CCECE.2004.1349759
Filename
1349759
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