DocumentCode
1709749
Title
An optimized CMOS compatible photoreceiver
Author
Gadiri, A. ; Savaria, Y. ; Kaminska, B.
Author_Institution
Dept. of Electr. Eng., Ecole Polytech., Montreal, Que., Canada
Volume
1
fYear
1995
Firstpage
211
Abstract
A method is proposed to improve the performances of integrated silicon based photodetectors compatible with CMOS technology. This method couples fast current mode circuits with CMOS compatible photodetectors. Based on HSPICE simulations, an optimized configuration is obtained and its performances are characterized. The results indicate that a speed as high 330 MHz is possible with 0.8 μm CMOS technology
Keywords
CMOS integrated circuits; SPICE; circuit optimisation; elemental semiconductors; integrated optoelectronics; optical receivers; photodetectors; photodiodes; 0.8 micron; 330 MHz; HSPICE simulations; Si; fast current mode circuits; integrated Si based photodetectors; optimized CMOS compatible photoreceiver; optimized configuration; performance; CMOS technology; Circuit simulation; Costs; Gallium arsenide; Integrated circuit interconnections; Integrated circuit technology; Optical receivers; Photodetectors; Photodiodes; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 1995. Canadian Conference on
Conference_Location
Montreal, Que.
ISSN
0840-7789
Print_ISBN
0-7803-2766-7
Type
conf
DOI
10.1109/CCECE.1995.528111
Filename
528111
Link To Document