A high performance DC-80 GHz distributed amplifier in 40-nm CMOS digital process

A dc-80 GHz compact distributed amplifier (DA) with 15-dB small signal gain is developed in 40-nm CMOS digital process. The circuit architecture is based on the conventional DA (CDA) with gain cell of cascaded single-stage DA (CSSDA). In order to minimize the chip size, the artificial transmission-line sections of DA are implemented with microstrip-line instead of coplanar-waveguide (CPW), and the inter-digital capacitors are optimized for broadband response. This circuit performs 450-GHz gain-bandwidth (GBW) product under 90-mW dc-power and only occupies a compact chip size of 0.31 mm² including the pads. To the authors´ knowledge, this circuit performs highest ratio of GBW product to the chip size (GHz/mm²) with small dc-power in the CMOS process.