DocumentCode
1711543
Title
Low-cost hardware profiling of run-time and energy in FPGA embedded processors
Author
Aldham, Mark ; Anderson, Jason ; Brown, Stephen ; Canis, Andrew
Author_Institution
ECE Dept., Univ. of Toronto, Toronto, ON, Canada
fYear
2011
Firstpage
61
Lastpage
68
Abstract
This paper introduces a low-overhead hardware profiling architecture, called LEAP, that attains real-time cycle and energy profiles of an FPGA-based soft processor. A novel technique is used to associate profiling data with specific functions in a way that is area- and power-efficient. Results show that relative to a previously-published hardware profiler, our design uses up to 18× less area and 8.6× less energy. LEAP is designed to be extensible for a variety of profiling tasks, three of which are investigated in this paper. We also demonstrate the utility of LEAP in the context of hardware/software co-design of processor/accelerator FPGA-based systems.
Keywords
coprocessors; embedded systems; field programmable gate arrays; hardware-software codesign; FPGA embedded processors; LEAP; energy profiles; hardware/software co-design; low-cost hardware profiling; processor/accelerator FPGA-based systems; Accuracy; Computer architecture; Field programmable gate arrays; Hardware; Program processors; Radiation detectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-Specific Systems, Architectures and Processors (ASAP), 2011 IEEE International Conference on
Conference_Location
Santa Monica, CA
ISSN
2160-0511
Print_ISBN
978-1-4577-1291-3
Electronic_ISBN
2160-0511
Type
conf
DOI
10.1109/ASAP.2011.6043237
Filename
6043237
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