DocumentCode
1711775
Title
VHSIC technology insertion into the AP-102 avionics processor family
Author
Stuart, Kenneth C.
Author_Institution
IBM Federal Syst. Co., Owego, NY, USA
fYear
1992
Firstpage
183
Lastpage
188
Abstract
To meet the need for additional performance and memory, IBM has defined an approach to insert VHSIC (very high speed integrated circuit) technology into the AP-102, while avoiding any changes to the external operational interfaces and, at the same time, minimizing effects on the existing operational flight software. The objective of the AP-102 upgrade effort is twofold: (1) to develop a high-performance replacement for the AP-102 CPU (central processing unit) card and memory card(s) with options for various amounts of memory via directly populating components, and (2) to modify the AP-102 battery backup unit to provide a 30-day warning plus additional current capacity. The AP-102A represents a significant improvement in performance, memory capacity, reliability, power, weight, and reduced logistics support, and will allow weapons systems to effectively incorporate new functions and capabilities to improve mission success
Keywords
VLSI; aircraft instrumentation; computerised instrumentation; digital integrated circuits; microprocessor chips; military standards; weapons; AP-102 CPU; AP-102 avionics processor; IBM; VHSIC technology; external operational interfaces; high-performance replacement; memory capacity; mission; operational flight software; performance; reduced logistics support,; reliability; very high speed integrated circuit; weapons systems; Aerospace electronics; Batteries; Contracts; Costs; MOS devices; Military aircraft; Processor scheduling; Throughput; Very high speed integrated circuits; Weapons;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital Avionics Systems Conference, 1992. Proceedings., IEEE/AIAA 11th
Conference_Location
Seattle, WA
Print_ISBN
0-7803-0820-4
Type
conf
DOI
10.1109/DASC.1992.282162
Filename
282162
Link To Document