A CMOS 45 GHz power amplifier with output power > 600 mW using spatial power combining

A single-chip 45 GHz power amplifier implemented in 45nm CMOS SOI is described, which feeds its RF output power to a 2×2 antenna array on an accompanying printed circuit board. The chip results in a maximum RF output power of 28 dBm (630 mW), and the system achieves a peak equivalent isotropic radiated power (EIRP) of 10 Watts (for a 2×2 antenna gain of 12 dB). The power amplifier is composed of 4 unit amplifier cells, each of which has pseudo-differential outputs. Stacking of 4 transistors was used in order to increase allowable voltage swings. The overall chip dimensions are 4.5 × 2.5 mm². The DC power consumption was 4.9 W from 5.5 V and 4.0 V supplies, corresponding to a power-added efficiency of 13.5%.