DocumentCode
1712220
Title
On the performance of GPU public-key cryptography
Author
Neves, Samuel ; Araujo, Filipe
Author_Institution
Dept. of Inf. Eng., Univ. of Coimbra, Coimbra, Portugal
fYear
2011
Firstpage
133
Lastpage
140
Abstract
Graphics processing units (GPUs) have become increasingly popular over the last years as a cost-effective means of accelerating various computationally intensive tasks. We study the particular case of modular exponentiation, the crucial operation behind most modern public-key cryptography algorithms. We focus our attention on the NVIDIA GT200 architecture, currently one of the most popular for general purpose GPU computation. We report our efforts to run modular exponentiation faster than any other method we were aware of for GPUs. Part of our performance advantage results from a different interleaving of the Montgomery multiplication, which was neglected in previous literature. The other part comes from carefully exploring general techniques, like loop unrolling and inline PTX assembly. Our throughput results, at over 20000 RSA-1024 decryptions per second or 41426 512-bit modular exponentiations per second, present a significant speedup over previous GPU implementations, without any significant latency penalty. Lastly, we evaluate our results in light of several popular metrics, namely performance/price and performance/watt ratios. We find that, while current GPUs generally perform better than CPUs, they show worse performance/watt ratios.
Keywords
computer graphic equipment; coprocessors; public key cryptography; GPU public key cryptography; Montgomery multiplication; NVIDIA GT200 architecture; PTX assembly; RSA-1024 decryptions; general purpose GPU computation; graphics processing units; modular exponentiation; Assembly; Computer architecture; Educational institutions; Graphics processing unit; Instruction sets; Registers; Software algorithms; CUDA; GPGPU; Modular exponentiation; Montgomery multiplication; RSA;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-Specific Systems, Architectures and Processors (ASAP), 2011 IEEE International Conference on
Conference_Location
Santa Monica, CA
ISSN
2160-0511
Print_ISBN
978-1-4577-1291-3
Electronic_ISBN
2160-0511
Type
conf
DOI
10.1109/ASAP.2011.6043261
Filename
6043261
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