DocumentCode
1712626
Title
Design and implementation of a dual-interface radar data recorder
Author
Jun, Wang ; Hai, Jiang ; Yuxi, Zhang ; Wang, Yao ; Yuxian, Zhang
Author_Institution
Group 203, Beihang Univ. (BUAA), Beijing, China
Volume
3
fYear
2010
Abstract
This paper analyses the design and implementation of a small-scale dual-interface radar data recorder based on DSP+FPGA. It has two types of interfaces: solid-state IDE hard disk and RJ45. The recorder can save sampling data of original radar waveforms in real time for further analysis and validation. It adapts to a variety of application environments and has a high storage speed and reliable operation performance. It can be widely used in radar testing and flight experiments.
Keywords
data recording; field programmable gate arrays; radar imaging; DSP; FPGA; dual-interface; radar data recorder; solid-state IDE hard disk; Control systems; Digital signal processing; Field programmable gate arrays; Hard disks; Indexes; Radar; Registers; PD radar; data record; network interface; solid-state IDE hard disk;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems (ICSPS), 2010 2nd International Conference on
Conference_Location
Dalian
Print_ISBN
978-1-4244-6892-8
Electronic_ISBN
978-1-4244-6893-5
Type
conf
DOI
10.1109/ICSPS.2010.5555419
Filename
5555419
Link To Document