A novel methodology for transistor-level power estimation [CMOS circuits]

Transistor-level power simulators, which are more accurate than logic-level power estimators, are popular to estimate the power dissipation of CMOS circuits. We introduce a method which extends the Monte-Carlo approach for deriving the average power dissipation of a circuit using transistor-level power simulators. To reduce the simulation time, we propose a mixed-level extrapolation technique to speed up the convergence rate of the process, and thereby to achieve a good balance between simulation time and accuracy. Experimental results show that this is a promising method for deriving the accurate power dissipation of a circuit within a reasonable time budget