An LMS-based close-loop digital predistorter for RF power amplifiers using NARMA structure

This paper presents a design of close-loop digital predistorter (DPD) for Power Amplifier (PA), which can be fully performed in a Field Programmable Gate Array(FPGA) without the need of additional Digital Signal Processor(DSP) or Personal Computer(PC) to run the procedure of adaptation. The adaptation of look-up table of the Nonlinear Auto Regressive Moving Average (NARMA) model is realized by Least Mean Square (LMS) algorithm and the mapping relationship in the structure. Specific details of the LMS algorithm and the mapping relationship are provided. Finally, the results of an FPGA implementation demonstrate the performance (adjacent channel power ratio and error vector magnitude) of PA can be improved by our method.